Logic gates — AND, OR, NOT, NAND, NOR, XOR with universal gate construction

medium CBSE JEE-MAIN 4 min read

Question

What are the basic logic gates and their truth tables? Why are NAND and NOR called universal gates, and how do we construct other gates from them?

Solution — Step by Step

NOT gate (inverter): Single input. Output is the complement.

  • Y=AY = \overline{A} (if A = 0, Y = 1; if A = 1, Y = 0)

AND gate: Output is 1 only when ALL inputs are 1.

  • Y=ABY = A \cdot B (both A and B must be 1)

OR gate: Output is 1 when ANY input is 1.

  • Y=A+BY = A + B (at least one must be 1)

NAND gate: AND followed by NOT. Output is 0 only when all inputs are 1.

  • Y=ABY = \overline{A \cdot B}

NOR gate: OR followed by NOT. Output is 1 only when all inputs are 0.

  • Y=A+BY = \overline{A + B}

XOR gate: Output is 1 when inputs are different.

  • Y=AB=AB+ABY = A \oplus B = A\overline{B} + \overline{A}B

A gate is universal if any other gate can be built using only that gate. Both NAND and NOR satisfy this.

Building from NAND gates only:

  • NOT: Connect both inputs of NAND together: AA=A\overline{A \cdot A} = \overline{A}
  • AND: NAND followed by NOT (another NAND used as inverter): AB=AB\overline{\overline{A \cdot B}} = A \cdot B
  • OR: NOT each input, then NAND: AB=A+B\overline{\overline{A} \cdot \overline{B}} = A + B (by De Morgan’s law)

Since we can build AND, OR, and NOT from NAND alone, we can build ANY Boolean function using only NAND gates.

graph TD
    A[NAND Gate: Universal] --> B["NOT: tie inputs together"]
    A --> C["AND: NAND + NOT"]
    A --> D["OR: NOT inputs, then NAND"]
    E[NOR Gate: Universal] --> F["NOT: tie inputs together"]
    E --> G["OR: NOR + NOT"]
    E --> H["AND: NOT inputs, then NOR"]
    B --> I[All gates from NAND]
    C --> I
    D --> I

Why This Works

The universality comes from De Morgan’s theorems:

AB=A+B\overline{A \cdot B} = \overline{A} + \overline{B} A+B=AB\overline{A + B} = \overline{A} \cdot \overline{B}

These theorems let us convert between AND/OR operations by adding inversions. Since NAND and NOR inherently include an inversion (the NOT bar), they can bridge between AND and OR operations.

GateBoolean ExpressionOutput is 1 when…
ANDABA \cdot BBoth inputs are 1
ORA+BA + BAt least one input is 1
NOTA\overline{A}Input is 0
NANDAB\overline{A \cdot B}NOT both inputs are 1
NORA+B\overline{A + B}Both inputs are 0
XORABA \oplus BInputs are different

Alternative Method

For truth table questions, remember the patterns:

  • AND: only one row with output 1 (both inputs 1)
  • OR: only one row with output 0 (both inputs 0)
  • NAND: only one row with output 0 (both inputs 1)
  • NOR: only one row with output 1 (both inputs 0)
  • XOR: output 1 when inputs differ

NAND and NOR are simply AND and OR with inverted outputs — their truth tables are the complement of AND and OR respectively.

Common Mistake

Students confuse NAND with NOR when constructing other gates. Remember: NAND builds OR by inverting inputs (De Morgan: AB=A+B\overline{\overline{A} \cdot \overline{B}} = A + B), while NOR builds AND by inverting inputs (A+B=AB\overline{\overline{A} + \overline{B}} = A \cdot B). Getting this backward means every derived gate is wrong. In CBSE boards, a 3-mark question on universal gate construction is almost guaranteed.

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