Class 12 — Semiconductors

Chapter Overview & Weightage

Semiconductors carries an 8-mark allotment in Class 12 Physics, split between conceptual questions (intrinsic vs extrinsic, p-n junction behaviour) and circuit problems (diode, transistor configurations, logic gates). The chapter has been “reduced” in recent NCERT updates, but it remains a regular fixture in board papers.

Year	Marks Allotted	Question Distribution
2024	8	1 long + 2 short
2023	7	Logic gates + diode
2022	8	p-n junction + LED
2021	6	Circuit analysis
2020	8	Transistor (now removed)

Post-2023 NCERT, transistor as amplifier has been dropped. Focus on diode behaviour, p-n junction, and logic gates — these together cover 6-8 marks reliably.

Key Concepts You Must Know

Intrinsic vs extrinsic semiconductors: pure Si/Ge vs doped versions.
n-type and p-type: doping with pentavalent (n) or trivalent (p) atoms.
Energy band diagram: valence band, conduction band, forbidden gap.
p-n junction formation: depletion region, built-in potential.
Forward and reverse bias: I-V characteristics.
Diode applications: rectifier (half-wave, full-wave), Zener for voltage regulation.
Logic gates: AND, OR, NOT, NAND, NOR — truth tables.
LED: light emission via electron-hole recombination.

Important Formulas

$I = I_0\left(e^{eV/kT} - 1\right) \quad\text{(diode equation)}$

$V_{\text{barrier}} \approx 0.7\text{ V (Si)}, 0.3\text{ V (Ge)}$

The barrier voltage matters when applying KVL across a diode in a circuit.

$V_{\text{dc}} = \frac{V_m}{\pi}, \quad V_{\text{rms}} = \frac{V_m}{2}$

For full-wave: $V_{\text{dc}} = 2V_m/\pi$ .

These formulas come up in numerical questions about ripple factor and efficiency.

Solved Previous Year Questions

PYQ 1 (CBSE 2024)

Draw the I-V characteristic of a Zener diode and explain its use as a voltage regulator.

The reverse-bias region shows a sharp breakdown at the Zener voltage $V_Z$ , beyond which voltage stays constant despite varying current. In a regulator circuit, the Zener is placed in parallel with the load and reverse-biased above $V_Z$ — any input fluctuation is absorbed by changes in current through the Zener, keeping load voltage stable.

PYQ 2 (CBSE 2023)

Find the output of a circuit where two NAND gates are connected such that the output of one feeds both inputs of the second. Inputs A, B feed the first NAND.

First NAND: $\overline{AB}$ . Second NAND with both inputs = $\overline{AB}$ : $\overline{\overline{AB} \cdot \overline{AB}} = AB$ . So the combined circuit acts as an AND gate.

PYQ 3 (CBSE 2022)

A p-n junction diode in forward bias passes $5\text{ mA}$ when the voltage across it is $0.7\text{ V}$ . If the diode is in series with a $300\,\Omega$ resistor and a $2\text{ V}$ battery, verify that the operating point is consistent.

KVL: $2 = 0.7 + 300 \times I$ , so $I = 1.3/300 = 4.33\text{ mA}$ . Close to $5\text{ mA}$ — consistent with the diode’s operating curve at this voltage.

Difficulty Distribution

Sub-topic	Easy	Medium	Hard
Definitions	70%	25%	5%
Diode I-V	40%	50%	10%
Rectifiers	30%	60%	10%
Logic gates	50%	40%	10%

The chapter is mostly easy-to-medium difficulty by board standards. The hard questions usually combine logic gate identification with circuit analysis.

Expert Strategy

Memorise the four corner cases (00, 01, 10, 11) for each gate. CBSE board questions almost always test recognition rather than derivation.

Always state the number of holes/electrons in any doping question. CBSE marking scheme awards a separate mark for “majority” and “minority” carriers.

For p-n junction questions, draw the energy band diagram. A clean diagram earns 1-2 marks even if the explanation has minor flaws.

Common Traps

Confusing p-type with n-type doping. p-type has trivalent dopants (B, Al) creating holes; n-type has pentavalent dopants (P, As) creating free electrons. Mix these up and the entire answer collapses.

Treating a diode as an ideal short circuit in forward bias. The 0.7 V drop matters in numerical problems — students who ignore it get currents that are 15-20% too high.

Confusing NAND with NOR. NAND output is 0 only when both inputs are 1; NOR output is 1 only when both inputs are 0. The truth tables are different at three of four rows.